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        A technical introduction to NAND flash

        Staff | Date: May 5, 2006 | Comments: 1



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        • Filed Under: News

        A detailed, highly technical introduction to Flash memory, focusing on NAND flash, has been published by CommsDesign. The article was excerpted from a paper presented at this year's Embedded Systems Conference by Jim Cooke, a principal applications engineer at Micron.




        Cooke's article first compares NAND and NOR flash, explaining not only how the two most common flash memory types differ, but why. He compares NAND's sequential, paged structure to the way hard drives work, noting that random access is only possible by "shadowing" to RAM -- unlike NOR, where support for random access allows techniques such as XIP (execute in place).

        Cooke then shifts his focus exclusively to NAND, noting that despite its shortcomings for program storage, more embedded processors today support NAND than NOR boot devices.

        Using diagrams, tables, and deeply technical explanations, he describes NAND's basic operation, including:
        • reset operation
        • read ID operation
        • read status operation
        • program operations
        • random data input operation
        • read operation
        • program page cache mode command

        Cooke then describes how NAND is connected to processors, either through a built-in NAND interface or a custom-designed glueless interface. He wraps up with a look at MLC (multi-level cell) NAND technologies, which offer higher densities at the cost of reduced speed and reliability.

        Read the full article to learn everything you ever wanted to know, and possibly more, about NAND flash. It's located here:

        As the price of NAND flash tumbles, it become a viable replacement for a hard drive




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