The SPEAr1340 follows the SPEAr1310 announced last July, the first of a series of SPEAr1300 dual ARM Cortex-A9 SoCs that support fully symmetrical operation at up to 600MHz per core. The SoCs provide a DDR3 memory interface, and are manufactured using 55nm HCMOS (high speed CMOS) technology.

While the SPEAr1310 is aimed at the general embedded market, including industrial automation, the SPEAr1340 is the multimedia superstar of the family. Like most other Cortex-A8 and Cortex-A9 SoCs, it now adds 3D graphics and video accleration.

In addition to its dual 600MHz Cortex-A9 cores, the SPEAr1340 offers an ARM Mali 200 GPU that offers 2D and 3D graphics acceleration. The Mali 200 GPU is said to support OpenGL ES 2.0 and OpenVG 2.0 standards.

A new hardware video encoder/decoder, meanwhile, accelerates a long list of compression standards including H.264, AVS, and VP8, supporting video up to 1080p at 30 frames per second (fps), says ST. With its I2S and S/PDIF interfaces, the SPEAr1340 can also provide up to 7.1 surround-sound configurations in both input and output paths, says the company.

As a result of these enhancements, the SPEAr1340 can meet the needs of a broader range of smart connected devices, including videoconferencing, intelligent displays, web-connected devices, navigation systems, and gaming systems, claims ST. Also new to the SPEAr1340 is the ability to handle multiple concurrent video flows with up to four camera inputs, enabling video surveillance applications.

SPEAr1340 block diagram

In other areas, ST has removed or scaled back some of the SPEAr1310 interfaces that were focused on industrial applications. For example, the SPEAr1340 loses its predescessor's dual CAN interfaces, and it gets by with a single gigabit Ethernet interface instead of two gigabit and three fast Ethernet interfaces.

There's only one PCI Express or one SATA interface instead of three PCIe or two SATA interfaces, and no PCI bus whatsoever. Meanwhile, UARTs have been stripped down to two instead of six, says ST.

Interfaces common to both SPEAr SoCs are said to include dual USB 2.0 host ports and a USB 2.0 OTG port, as well as an SSP port and two I2C ports. Like the earlier model, the SPEAr1340 also integrates a multi-standard cryptographic engine and one time programmable (OTP) registers for unique identification and external flash memory anti-tamper protection, says ST.

Specifications listed for the SPEAr1340 include:

• CPU subsystem:
  • 2 x ARM Cortex A9 cores, up to 600MHz
  • symmetric (SMP) and asymmetric (AMP) multiprocessing support
  • 32+32 KB L1 instructions/data cache per core with parity check
  • Shared 512KB L2 cache (ECC protected) with parity check
  • accelerator coherence port (ACP)
  • 64-bit multilayer network-on-chip (NoC) bus
• Memory:
  • 32KB boot-ROM
  • 32KB + 4KB internal SRAM
  • up to 1GB DDR2-800/ DDR3-1066 with 16-/32-bit datapath with ECC option
  • supports external NAND flash, and parallel or external serial NOR flash
  • supports asynchronous SRAM
  • memory card interface
    
• Expansion/storage -- either PCIe 2.0 RC/EP link (embedded PHY) or SATA gen-2 host port
• Display/video:
  • TFT LCD controller, up to 1920 x 1200 (60Hz), 24 bpp
  • ARM Mali 200 2D/3D (GPU), up to 1080p, OpenGL ES 2.0, OpenVG 2.0
  • HD video decoder, up to 1080p (multiple formats)
  • HD video encoder, up to 1080p (H264 or JPEG 67-megapixel)
  • digital video input port, with alternate 4x camera interfaces
  • touchscreen I/F (4-wire resistive)
• Audio:
  • up to 7.1 multichannel surround
  • 2 x I2S ports (8 x input; 8 x output)
  • SPDIF I/O
• Networking -- 1 x 10/100 or 10/100/1000 Ethernet
• Other I/O:
  • 2 x USB 2.0 host ports (embedded PHYs)
  • USB 2.0 OTG port with integrated PHY
  • 2 x UARTs
  • SSP port (SPI and other protocols), master/slave, up to 41Mbps, 4x CS
  • 2 x I2C ports, master/slave
  • 6x6 keyboard controller
  • 2 x consumer electronic control (CEC) ports
• Other features -- C3 cryptographic accelerator; 510+209 OTP bits; timers; RTC; 8-channel DMAC; 10 bit AD; 4 x PWM generators; GPIO; temp. sensor; JTAG-PTM
• Power saving features -- power islands; clock gating; dynamic frequency scaling

Stated Loris Valenti, general manager of STMicroelectronics' Computer Systems Division, "The unique combination of formidable processing power, high-level features, peripheral integration and advanced multimedia capabilities targets applications from entry-level web-connected devices to video-conferencing and security systems."

Further information

Operating system support was not detailed for the SPEAr1340, and wenoted mention of only Linux for the SPEAr300, 310, 320, and 600SoCs released in 2010. However, earlier SPEAr offerings were also said to support WindowsCE.

Samples of the SPEAr1340 are now available to lead customers for evaluation and prototyping, says ST. More information may be found at ST's SPEAr1340 page.

---

Related Stories:

• SoC has dual ARM Cortex-A9 cores
• ARM's Cortex-A9 finds another home
• ARM tips faster Mali GPU and interconnect for 2.5GHz Cortex-A15
• ARM9 SoCs target diverse markets
• Chip architecture unifies Cortex-A9 cores with FPGAs
• Die-shrunk Cortex-A9 touted as 40 percent faster
• Nvidia aims Cortex-A9 SoC at tablets
• TI unveils OMAP4
• ARM: More than 1.3 billion served in Q4 2009
• Mobile multimedia processor adds performance, security
• ARM9 SoC has mixed-signal analog onboard, too
• 40nm ARM design supports up to four cores