| Intel aims x86 at digital TVs |
Aug. 20, 2008
Intel will ship a Pentium M-based system-on-chip (SoC) for consumer devices such as networked optical players, set-top boxes, and digital TVs. The 800MHz Media Processor CE3100 ("Canmore") aims to bring YouTube and other PC-based entertainment platforms to home entertainment systems, where today MIPS-based SoCs from Sigma, Broadcom, and others dominate.
Intel calls the CE 3100 "the first in a new family" of SoCs aimed at the consumer electronics segment. More specifically, it targets network-enabled optical drives and set-top boxes, where today MIPS is probably the dominant architecture, thanks to popular offerings from Sigma, Broadcom, and others. Intel appears to be hoping that x86's better support for the software needed to run YouTube and other PC-based entertainment platforms will help it compete, as the PC and CE markets continue to converge.
Canmore function block diagram
(Click to enlarge)
Touted Canmore features include:- High-definition video support
- "Home-theater quality" 7.1 audio
- 3-D graphics
- Multi-stream video decoding and processing hardware
- Dedicated multi-channel dual audio DSPs
- 3-D graphics engine enabling advanced UIs and EPGs
- USB 2.0 and PCI Express expansion
- Intel Media Play:
- Hardware MPEG-2, H.264, and VC-1 decoders, for broadcast TV and optical media
- Software codecs for "Internet content" (for greater flexibility)
Specifications listed by Intel include:- 800MHz Core Frequency
- 256K 2-way set-associated L2 cache
- 100/133MHz FSB
- 800MHz Core Frequency
- PowerVR SGX535 3D/2D graphics and video accelerator at 216MHz
- 3-channel 32-bit DDR2 memory controller supports memory sizes from 64MB to 3GB
- 250MHz RISC-based video co-processor
- Dual 340Mhz DSP cores programmed in microcode for audio operations:
- Audio decode (DD+, DTS-HD, AC3, AAC, MP3, WM, Lossless)
- Audio encode (AC3, DTS)
- Audio effects, resampling, mixing
- HDMI audio support including high-bit rate (HBR) audio
- 5 x I2S outputs for 7.1 channel audio + stereo audio outputs
- 1 x S/PDIF output
- 24-bit 192KHz audio support
- Configurable 10-stage graphics pipeline supporting dual 1080i@60 input, and 1.5x 1080p@60 output
- HDMI/DVI 1.3a compliant video interface with support for 1080p, 36-bit deep color in RGB/YUV
- Video output composition hardware
- Peripherals
- 2 USB 2.0 host ports
- Ethernet 802.3 10/100/1000 MAC with RGMII/RMII interface
- 2 x SATA-150
- 2 x single lane PCI Express ports
- IR remote support
- 3 x I2C interfaces with 1 additional dedicated for DDC (HDMI)
- 1 x SPI Interface with 4 chip-selects
- 2 x UARTS, one with hardware handshake signals for modem connectivity
- Configurable parallel expansion bus with 4 chip-selects
- NOR flash boot interface
- 16 x GPIO pins (8 dedicated: other pinmuxed)
- Timers, RTC
- Other feature:
- 250MHz system clock
- Unified Memory Architecture (UMA)
- PCI mapped internal devices
- Legacy and MSI (message based) interrupt support
- Coherent Data path for control and non-coherent data path
for bulk video data
- IEEE 1491.1 complaint JTAG
- 609 signal pins in a 37.5mm lead free FC-BGA7 (1434 balls) package
Eric Kim, GM of Intel's digital home group, stated, "The Web is quickly moving to the TV. [The CE 3100 is our] first IA SoC with Internet compatibility for consumer electronics devices."
Canmore appears to be Intel's second x86-based SoC, and its first for consumer electronics devices. The company earlier shipped the EP80579 ("Tolapai"), also based on a Pentium M core, and targeting storage applications.
Intel based previous CE-series chips, such as the CE 2110, on the ARM architecture.
System-on-chip processors typically integrate a CPU core with memory and storage controllers, display controllers, on-chip peripheral interfaces, and specialized hardware subsystems such as security co-processors, all on the same physical die.
Availability
The CE 3100 will ship next month. Early customers reportedly include Samsung and Toshiba. Pricing was not stated.
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