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MIPS unveils "highest performing" 32-bit CPUs for embedded apps
Oct. 13, 2003

MIPS Technologies unveiled details of what it claims is the highest performing 32-bit synthesizable core family available to the embedded market, today at the Microprocessor Forum in San Jose, Calif. The new cores, derivatives of the recently introduced MIPS32 24K microarchitecture, target applications requiring high performance microprocessors to deliver an optimized user experience, in broadband access, office automation, and digital consumer devices.

MIPS says its MIPS32 24K core family includes four 24K cores that offer a variety of configurations to support customer requirements. All cores include Release 2 features of the MIPS32 architecture that support multiprocessing, enhanced bit-field manipulation, reduced interrupt latency, and enhanced cache control. Each core is designed to serve the performance driven needs of a range of applications, and features a range of options from user extendable instructions to floating point configuration.

Here are some highlights regarding the four new cores:
  • 24Kc core: Base version incorporating an eight stage pipeline that is optimized for high performance. Includes a 32x32 Multiply/Divide Unit and configurable memory management unit with TLB or fixed mapping. Ideal for next-generation control plane applications.

  • 24Kf core: Includes hardware floating point support that is fully compliant with the IEEE 754 standard. Floating point is a key component of several major applications.

  • 24Kc and 24Kf Pro versions: Enabled with user extendable instructions, featuring the CorExtend capability. This facilitates optimization of algorithms for data-plane style processing within a programmable environment. CorExtend technology is fully compatible with the industry-standard MIPS32 architecture, so full tool chain support is maintained.



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