| Low cost, ultra-low-power ARM processor runs Windows CE |
Nov. 15, 2005
Atmel is shipping what it calls the "first ultra low-power, deterministic microcontroller." The AT91SAM9261 integrates an ARM9 core, USB2, and an LCD interface, costs less than $10 in volume, and consumes less than 400 microamps when clocked at 0.0005 MHz, Atmel claims. It supports Windows CE, and targets wireless handheld applications, such as POS devices.
Atmel says the AT91SAM9261 can deliver 200 MIPS (million instructions per second) when clocked at its standard "industrial" rate of 180 MHz. At this frequency, it draws 65 milliamps, with all peripherals turned on.
In standby mode, it draws just 2.5 microamps, the company claims.
The AT91SAM9261 is the newest product in Atmel's line of AT91 chips, all of which support ARM's Thumb instructions. Thumb instructions are 16-bits long, in order to maximize code density and reduce power use in applications that do not need 32-bit instructions.
In calling the SoC "deterministic," Atmel refers to the chip's ability to execute code from on-chip memory with no latency, making it possible to predict the exact cycle at which real-time instructions will execute. This overcomes a short-coming of the "code-shadowing" used in most ARM cores to improve performance, but which has limited ARM's utility in real-time applications, according to Atmel.
The AT91SAM9261 includes 32KB of ROM, along with 160KB of SRAM, both of which feature "single-cycle access" when the processor and bus are running full-speed, Atmel says. Alternatively, the onboard SRAM can be configured as a frame buffer, in order to minimize the effect of LCD refreshes on overall system performance.
The AT91SAM9261 is based on an ARM926EJ-S core, which in addition to Thumb instructions includes ARM's Jazelle Java accelerator. The core also supports DSP instructions, allowing it to process signals or cryptographic tasks in bursts, and then shut down to conserve power, Atmel says. The core has 16KB each of instruction and data cache.
The ARM926EJ-S core is also used in Windows CE-friendly SoCs from STMicro, Agere, Sony, Freescale, NetSilicon, Toshiba, and others.
Atmel AT91SAM9261 block diagram
(Click to enlarge)
Built-in controllers and interfaces include: - External memory bus -- supports SDRAM, static RAM, NAND Flash, and CompactFlash
- LCD controller
- B/W or 16-bit color on STN displays
- 24 bit color on TFTs, or up to 2048 x 2048 resolution
- Other I/O interfaces
- USB 2.0 host and device ports -- support Bluetooth, DECT, or WiFi radios
- 3 x synchronous serial controllers
- 3 x USARTs (universal synchronous/asynchronous transceivers)
- 2 x SPI (serial peripheral interface)
- MMC and SD card interface
- 3 x 32-bit PIO (parallel I/O) controllers
- System controllers
- Reset controller
- Shutdown controller
- Clock generator
- Power management controller
- Periodic interval timer
- Watchdog timer
- Eight-level priority interrupt controller
- Up to 32 internal or external interrupt sources
- Individually maskable
- Bus matrix supporting five bus masters
- Processor instruction and data buses
- 19-channel peripheral DMA controller
- USB and LCD controllers
- Debugging interfaces
- 2-wire debugging controller
- JTAG-ICE
- Dedicated UART debug channel
Availability
The AT91SAM9261 is shipping now in a 217-ball LFBGA RoHS-compliant package, priced below $10 in volume. An AT91SAM9261-EK evaluation kit supporting third-party compilers, debuggers, and other tools is also available.
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