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Efficeon processor gains Microsoft WHQL self-test status
Feb. 10, 2004

Transmeta Corp. says its Efficeon TM8000 family of microprocessors has been awarded the Microprocessor Self-test Certification by Microsoft's Windows Hardware Quality Labs (WHQL).

According to Transmeta, the Microprocessor Self-test Certification status confirms that Efficeon TM8000 CPUs are System Logo submission-ready and have already passed compatibility and quality testing at Microsoft. As a result, vendors using the Efficeon processors in their designs may now engage the "Self-test" protocol in acquiring a Microsoft "Designed for Windows" System Logo, which can reduce costs and minimize the time required to obtain this necessary product certification, Transmeta says. The "Designed for Windows" logo identifies products that deliver a high-quality experience with Microsoft Windows operating systems.

WHQL awards this certification only to microprocessors which have undergone and passed a rigorous set of tests at Microsoft, under WHQL's direction, over an extended period of time. OEMs and system manufacturers who use the certified microprocessor in system designs with current Microsoft operating systems may conduct a simplified system logo submission process and reduce their logo award time.

"This certification also confirms that our Efficeon CPUs have already met Microsoft WHQL's compatibility and quality requirements for microprocessors, simplifying the process for our customers in obtaining the 'Designed for Windows' logo," commented Arthur L. Swift, senior vice president of marketing for Transmeta.

Previously, Transmeta had been awarded Self-test Certification for the TM5x00 family of Crusoe microprocessors in January 2002.

Transmeta describes its Efficeon processor as follows:
The Transmeta Efficeon processor is designed to provide power efficiency, design flexibility, performance-on-demand and low cost to meet the need of the next generation of mobile, wireless, and embedded devices. It includes three new high performance bus interfaces: an on-chip HyperTransport bus interface for increased input/output efficiency, an on-chip Double Data Rate (DDR) SDRAM memory interface for increased throughput, and an on-chip AGP graphics interface for high performance graphics solutions. These new interfaces allow Efficeon to achieve more work per clock, which results in greater energy efficiency and longer battery life for mobile computer users. The Transmeta Efficeon processor's dynamic LongRun power management features and integrated architecture are designed to give system designers and marketers a wide range of choices in creating products that deliver added value, functionality, security, comfort, reliability, and cost savings to end users.



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